1. Field of the Invention
The present invention relates to a semiconductor device formed on a silicon-on-insulator (SOI) structure and to a method for manufacturing the semiconductor device.
2. Description of the Related Art
As the integration density of semiconductor devices increases, the distance between devices continues to decrease. Accordingly, an isolation distance required to electrically isolate devices from each other becomes reduced considerably, and thus it is difficult to prevent transistor devices from interfering with each other through the use of conventional isolation methods, such as local oxidation of silicon (LOCOS) or trench isolation. For example, latch-up, which acts between adjacent transistor devices, occurs more frequently. In order to prevent transistor latch-up, ion implantation has been employed to prevent punch-through of an insulating layer for isolation. However, as the distance between devices decreases, ion implantation cannot be considered an effective approach to prevent latch-up.
Accordingly, a silicon-on-insulator (SOI) wafer has been developed to form devices completely isolated from each other, unlike a conventional method for forming a device directly on a silicon wafer. The SOI wafer includes a base comprised of a general silicon wafer and has a structure in which an insulator is formed on the silicon wafer and a monocrystalline silicon layer is formed on the insulator. That is, the SOI wafer has a three-layered structure including a base layer formed of silicon, an intermediate layer comprised of an insulator, and a top layer formed of monocrystalline silicon.
Devices are formed on the top layer of the SOI wafer, which is formed of monocrystalline silicon. If transistors are formed on the SOI wafer having such a structure, each of the transistors is formed in an island shape so that the transistor devices can be completely isolated from one another and punch-through or latch-up can be prevented.
However, transistors formed on a semiconductor wafer, each generally including three terminals including a gate, a source, and a drain, and a ground path, must be prepared in the semiconductor wafer so that the basic circuit structure of a transistor device can be completed. However, in the case of the SOI wafer, an insulator is formed under the monocrystalline silicon layer of the SOI wafer, and thus it is difficult to provide a stable ground path perforating the insulator in the SOI wafer. Therefore, electric charges generated when an external voltage is applied to devices having an island shape cannot be released. Thus, the reference voltage of a transistor becomes unstable, and the operational characteristics of a device deteriorate.